The present invention relates to a field effect transistor having an extremely short channel length which possesses a doped semiconductor layer having oppositely doped source and drain zones introduced on the surface side and possessing a first gate electrode separated from the semiconductor surface by an insulating layer.
Transistors of this type are disclosed, for example, in the magazine "IEEE Journal of Solid-State Circuits", Vol. SC-10, No. 5, Oct. 1975, pages 322-331. In order to produce a high "punch-through voltge" which is defined as that value of the drain voltage at which the drain-side depletion zone reaches the source zone, and in order to simultaneously avoid the drain voltage noticeably influencing the transistor internal resistance, the transistors described in this publication are designed as so-called "DMOS field effect transistors", which are to be understood as a MOS-transistor structure which is obtained by a double-diffusion technique. Here the source and drain zones are diffused into the surface of a doped semiconductor layer at a normal distance from one another, although this diffusion process is preceded by another in which, in the source zone, there is formed a diffusion trough which fundamentally strengthens the doping of the semiconductor layer and into which the source zone is then diffused.
In the DMOS-technique, a transistor channel is formed, the main part of which runs between the edge of the diffusion trough and the edge of the drain zone, whereas only a very small part thereof lies between the edge of the diffusion trough and the edge of the source zone embedded in said diffusion trough. This latter part determines the effective channel length of the transistor within which the charge carrier transport is controlled by means of a gate electrode insulated from the semiconductor surface and by a control voltage supplied to said gate electrode, whereas the punch-through voltage assumes values which also occur in MOS-field effect transistors having a channel length corresponding to the source-drain interval.
In the field effect transistors produced in the DMOS-technique, the disadvantage occurs, however, that the effective channel length is dependent upon the course of the double-diffusion process. Since generally speaking a plurality of similar transistors, arranged in particular on a common substrate, are simultaneously subjected to this process, the effective channel lengths and the saturation voltages of all these transistors--the latter assuming equal gate voltages--are identical to one another or at least possess a process-dependent relationship to one another.